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IP5328P register description document
1 I2C interface
The chip can only support one I2C connection mode at the same time. If you connect according to the corresponding mode, the Function function will be closed and the I2C mode will be automatically entered.
The I2C speed support 400Kbps. Support 8 bit register address width and 8bit data width. Transmit and receive MSB
First. The default slave register address is 0xEA.
I2C acts as slave and is controlled by the master. The SCK line of the I2C interface is driven by the master. The
SDA line could be pulled up to VCC by a 3.3Kohm resister and pulled
down by either the master or the slave.A typical WRITE sequence for writing 8bits data to a register is shown in
below figure. A start bit is given by the master, followed by the slave address, register register address and 8-bit data.
After each 8-bit register address or data transfer, the IP5328P gives an ACK bit. The master stops writing by sending a
stop bit.
All 8 bits data must be written before the register is updated.
Example: Write 8bit data 0x5A to register 0x05, and the slave register address is 0xEA
SCLK
SDA
Start
sACK
Slave address 0xEA
sACK
Register address 0x05
sACK
Data 0x5A
Stop
Note: Sack generated by Slave, Mack generated by Master, and Mnack is a NACK generated by Master
Figure1 I2C WRITE
A typical READ sequence is shown in below figure. First the master has to write the slave address,followed by the
register address. Then a restart bit and the slave register address specify that a READ is generated. The master then
clocks out 8 bits at a time to read data.
Example: Read 8bit data 0x5A from register 0x05, and the slave register address is 0xEA
SCLK
SDA
Start
sACK
Slave address 0xEA
sACK
Register address 0x05
mNACK
Data 0x5A
Stop
Restart
sACK
Slave address 0xEB
Figure 2 I2C Read
Special note: At the end of the I2C read data, when the last BYTE is read, the NACK signal must be given, otherwise the IP5328P will think that the MCU needs to continue to read the data, and the next
Each SCLK will output the next data, and the STOP signal cannot be received normally, which may cause the I2C bus to be pulled dead.
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2 , the I2C the Application Notes
L1
VREG
L3
INT
3.3k
IIC mode
SLK
510K
L2
VREG
3.3k
SDA
1 , IP5328P standard default support I2C , do not need to be individually customized I2C version;
2 , IP5328P I2C highest frequency supports 400K , taking into account the MCU clock bias in the application of I2C when the MCU communication clock is recommended 200K left
right;
3. When IP5328P transitions from sleep state to working state (button, load access, 5V charging access), IP5328P will first detect L1 and
Whether L2 pin is pulled up to 3.1V (VREG), if L1 and L2 are pulled up to 3.1V at the same time, it will enter I2C mode, and L3 will output a 3.1V
If L1 and L2 are not detected at the same time, it will enter the LED display mode, and it will be checked every time it enters the working state from sleep.
Measurement;
4. Since the IP5328P will perform I2C detection when it enters the working state from sleep, the MCU needs to configure SDA and SCK during sleep
It is input or high-impedance state. It will not start to read or write I2C data until it detects that INT is high for more than 500ms , otherwise it will cause the IC to stop
When sleep enters the working state, it is detected that L1 or L2 is not pulled up and cannot enter the I2C state
5. Since the IP5328P enters the working state from sleep, it will perform I2C detection and the internal digital level of the IP5328P is 3.1V, so the MCU provides
The power must be powered by VREG. If the MCU is powered by an external LDO, when the BAT is dead or less than 2V, VIN is connected to 5V to supply the IP5328P
If the VREG has power, the system will perform I2C detection, but the MCU has no power, and the status of SDA and SCK is uncertain, which may cause L1 and L2 to fail to detect
Pull-up cannot enter I2C mode;
6. If you want to modify a certain register of IP5328P, you need to read the value of the corresponding register first to AND or operate the BIT bit that needs to be modified.
And then count the calculated value written into this register to ensure that only modify as needed bit other unopened bit value can not be altered arbitrarily , register
The default value of is subject to the read value. The default value of IC of different batches may be different.
7. MCU operation flow: After INT is high, after waking up the MCU, the I2C register can be read and written after waiting 500ms, and the register can be initialized first (requires repair
Only modify the register when changing the special function. If you don’t need to modify the register, you don’t need to write the register. Then read the internal information of the IC (electricity, charge and discharge status,
Button state) for characteristic requirements (such as special indicator light, charge and discharge management, fast charge request management) operations, when INT is low, it represents IP5328P
If you have entered the standby MCU, you can also consider entering a low-power mode.
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3 Typical Application Description
3.1 Judgment of charge and discharge status
Charge status flag bit: 0XD1 bit4=1;
Discharge status flag bit: 0XD1 bit4=0;
Full state flag bit: 0XD7 bit=1;
Not full state flag bit: 0XD7 bit=0;
Judge the current B port (VIN) input voltage is valid: 0XD2 bit4=1;
Judging that the current C port (VBUS) input voltage is valid: 0XD2 bit5=1;
3.2、LED light power data
Steps:
After setting INT high, write 1 to IP5328P 0X0A bit7, enable the register to control the LED mode, and then set 0X0A bit6-5 as the number of lights mode
(These two registers need to be written within 1S after INT is high);
Then read 0XDB bit4-0 to determine the current battery indicator.
3.3、IP5328P internal power information
The OCV voltage of the cell voltage inside the IP5328P (the voltage calculated by the cell terminal current and the set internal resistance compensation, charging only
Increasing the discharge will only decrease), the MCU can read the OCV voltage of the BAT and then set different turn-lamp voltage points for different cells for precise adjustment
The uniformity of power.
BATOCV information register:
Register address = 0x7A
Bit(s)
Name
Description
R/W
7:0
BATOCV [7:0]
Low 8bit of BATOCV data
BAT voltage is compensated by the internal resistance of the cell and the cell current
R
Register address = 0x7B
Bit(s)
Name
Description
R/W
7:0
BATOCV [15:8]
High 8bit of BATOCV data
OCV = BATOCV *0.26855mv+2.6V
BAT voltage is compensated by the internal resistance of the cell and the cell current
R
3.4 MCU reads the current and voltage information inside IP5328P for percentage display
The IP5328P has a BAT terminal current register (this current is the current value calculated initially through the output power and efficiency, so the
There is a certain error when the current is different). After the MCU reads the BAT terminal current, it can adjust the percentage display of the battery through time and current integration.
For example, the cell capacity is 10000mAH, and 1% of the capacity is 100 mAH after being divided into 100 equal parts. The BAT current is accumulated every 1S during discharge.
Add once, when the accumulated value reaches 100 mAH, the corresponding power will be reduced by 1%, while charging is the opposite.
BAT current (current information calculated by output power and efficiency) register:
Register address = 0x66
Bit(s)
Name
Description
R/W
7:0
BATIADC[7:0]
Lower 8bit of BATIADC data
R
Register address = 0x67
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Bit(s)
Name
Description
R/W
7:0
BATIADC[15:8]
High 8bit of BATIADC data
IBAT=BATVADC*1.27883mA
LSB=1.27883mA corresponds to 10mOhm sampling resistor
(Complement code format, charging is positive, discharging is negative)
For example: 00000000_00000001 means 1
11111111_11111111 means -1
11111111_11111110 means -2
R
3.5 MCU adjusts the battery full voltage through the register
Steps
1. Write 0 to 0X2C bit4 first, switch the battery full voltage to the internal register setting
Bit(s)
Name
Description
R/W
RESET
4
EN_VSET_R
VSET setting mode
1: Set by external VSET pin
0: Set 0X22 bit3-2 by register
RW
1
2. Set different charging voltages by adjusting the value of 0X22 bit3-2
Bit(s)
Name
Description
R/W
RESET
3:2
VCHG_SET
Charging constant voltage setting
11: 4.5V
10: 4.4V
01:4.35V
00: 4.2V
RW
00
3. If the customer needs to fine-tune the full charge voltage of the battery cell, the constant voltage pressure can be adjusted, and the IP5328P defaults to 14mV charging
Bit(s)
Name
Description
R/W
RESET
1:0
R_CV
4.5V/4.4V/4.35V/4.2V battery constant voltage fast charge:
11: Constant pressure increase by 42mv
10: Constant pressure increase by 28mv
01: Constant voltage increase by 14mv, by default 14mv
00: No increase,
If it is not charged with pressure, some ICs may not stop charging normally, and the MCU needs to judge by itself
Whether it is fully charged or not, the fully charged conditions can be set according to the cell voltage and cell current at the same time.
4.2V without voltage, the cell voltage is greater than 4.175&IBAT is less than 200MA, it is considered
In full state, there is no need to wait for the IP5328P to be fully charged.
RW
01
3.6 MCU closes and opens the input and output fast charge protocol of all ports through registers
1. Close and open the input fast charge protocol through the register (not including PD protocol):
Close the input fast charge protocol: write 0XA1 bit4-bit2 as 000;
Open the input fast charge protocol: write 0XA1 bit4-bit2 to 111;
2. Close and open the output fast charge protocol through the register (not including PD protocol)
Close the output fast charge protocol: write 0XA2 bit6-bit0 to 000000;
Open output fast charge protocol: write 0XA2 bit6-bit0 to 111111;
3. Close the input and output PD fast charge protocol
Close the input and output PD fast charge: 0X1C bit1 write 0;
Open input and output PD fast charge: 0X1C bit1 write 1;
Note: IP5328P input and output PD fast charge protocol only has a total enable, and there is no separate enable register for input and output.
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3.7 MCU closes and opens the input and output DM DP fast charge protocol of different ports through registers
Register address = 0x3E
Bit(s)
Name
Description
R/W
RESET
3
EN_QC_VBUS
VBUS channel fast charge enable
0: disable
1: enable
RW
1
2
EN_QC_VIN
VIN channel fast charge enable
0: disable
1: enable
RW
1
1
EN_QC_VOUT2
VOUT2 channel fast charge enable
0: disable
1: enable
RW
1
0
EN_QC_VOUT1
VOUT1 channel fast charge enable
0: disable
1: enable
RW
1
3.8 MCU reads the voltage of the NTC PIN to judge different temperatures
1. Set NTC multiplexing as ADC: 0X51 bit6-4 is written as 010
Register address = 0x51
Bit(s)
Name
Description
R/W
RESET
6:4
NTC_SEL
000: NTC function
010: ADC function
RW
000
2. Turn on the ADC function of GPIO_ADC: 0X80 bit4 write 1
Register address = 0x80
Bit(s)
Name
Description
R/W
RESET
4
EN_GPIO_ADC
GPIO_ADC enable
0: disable
1: enable
RW
0
3. Turn off NTC function: 0X04 bit0 write 0
Register address = 0x04
Bit(s)
Name
Description
R/W
RESET
0
EN_NTC
NTC protection enable
1: enable
0: disable
R/W
1
4. Read the voltage of NTC PIN: read the value of 0X78 0X79 to calculate the voltage of NTC PIN and do the corresponding processing.
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4 Read / write operation register
*Reserved registers cannot write data at will, and cannot change the original value, otherwise unexpected results will occur. To register
The operation must be carried out in accordance with read-modify-write. Only the used bits are modified, and the values ​​of other unused bits cannot be modified.
*The default register values ​​in this document only represent a certain specification. The default register values ​​of most specifications do not correspond to this document.
Pay special attention to bitwise operations when reading and writing operations.
SYS_CTL1 (boost and charger enable register )
4.1
Register address = 0x01
Bit(s)
Name
Description
R/W
RESET
7:3
Reserved
XX
2
EN_BOOST
Boost boost enable
1: enable
0: disable
R/W
1
1
EN_Charger
Charger charging enable
1: enable
0: disable
R/W
1
0
Reserved
XX
SYS_CTL2 (Key Control Register)
4.2
Register address = 0x03
Bit(s)
Name
Description
R/W
RESET
7
EN_loadotp
Boot register reset enable
1: enable
0: disable
(After this function is disabled, the IP5328P does not lose power every time the register is turned on.
Will be reset to default values. Generally, it is not recommended to operate this bit register to prevent MCU
(After the register is written by mistake, it cannot be automatically restored to the default value after booting)
R/W
1
6:4
Reserved
XX
3
Set_onoff_time
Long press time setting
0: 2s
1: 3s
R/W
0
2
En_onoffrst_r
Long press the button for 10S to reset enable
1: enable
0: disable
R/W
1
1:0
Set_onoff_dn
Button shutdown mode selection
00/10: disable
01: Short press twice
11: Long press
R/W
01
SYS_CTL3 (chip internal temperature and NTC temperature control register)
4.3
Register address = 0x04
Bit(s)
Name
Description
R/W
RESET
7
EN_BSTTMDN
Chip high temperature shutdown BOOST enable
1: enable
0: disable
R/W
1
6
EN_CHGTMDN
Chip high temperature off charger enable
1: enable
0: disable
R/W
1
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5
EN_NTCL_BST
NTC low temperature shutdown BOOST enable
1: enable
0: disable
R/W
1
4
EN_NTC_MID
NTC mid-temperature charging current halved enable
1: enable
0: disable
R/W
1
3
EN_NTC_CHG
NTC high and low temperature off Charger enable
1: enable
0: disable
R/W
1
2
EN_NTCH_BST
NTC high temperature shutdown BOOST enable
1: enable
0: disable
R/W
1
1
EN_NTC_SC
When NTC is grounded (NTC<0.2V), turn off NTC function enable
1: enable
0: disable
R/W
0
0
EN_NTC
NTC protection enable
1: enable
0: disable
R/W
1
IC_TEMP (IC internal over temperature register )
4.4
Register address = 0x42
Bit(s)
Name
Description
R/W
RESET
7:3
Reserved
XX
2
ENTSBST
The internal temperature protection points of the chip are all increased by 15C
1: enable
0: disable
R/W
0
1
HT
High temperature alarm and recovery temperature of chip internal temperature
1: 140C, 80C
0: 130C, 80C
R/W
1
0
TSEN
Chip internal temperature detection enable
1: enable
0: disable
R/W
1
CHG_NTC_TEMP ( Charge NTC threshold register )
4.5
Register address = 0x43
Bit(s)
Name
Description
R/W
RESET
7
EN_INTC
Enable NTC to discharge 20UA current
1: enable
0: disable
R/W
1
6:5
CHG_NTC_HT
Charging NTC high temperature threshold
11: 0.56V (theoretical temperature 45 degrees)
10: 0.49V (theoretical temperature 50 degrees)
01: 0.43V (theoretical temperature 55 degrees)
00: 0.38V (theoretical temperature 60 degrees)
R/W
01
4:3
CHG_NTC_MT
Charging NTC temperature threshold
11: 0.6V (Theoretical temperature is 41 degrees)
10: 0.58V (Theoretical temperature is 43 degrees)
01: 0.56V (theoretical temperature 45 degrees)
00: 0.54V (theoretical temperature 47 degrees)
R/W
01
2:1
CHG_NTC_LT
Charging NTC low temperature threshold
11: 1.52V (theoretical temperature -20 degrees)
10: 1.49V (theoretical temperature -15 degrees)
01: 1.44V (theoretical temperature -10 degrees)
00: 1.32V (theoretical temperature 0 degrees)
R/W
01
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BST_NTC_TEMP ( discharge NTC threshold register )
4.6
Register address = 0x54
Bit(s)
Name
Description
R/W
RESET
7:6
BST_NTC_HT
Discharge NTC high temperature threshold
11: 0.56V (theoretical temperature 45 degrees)
10: 0.49V (theoretical temperature 50 degrees)
01: 0.43V (theoretical temperature 55 degrees)
00: 0.38V (theoretical temperature 60 degrees)
R/W
01
5:4
BST_NTC_LT
Discharge NTC low temperature threshold
11: 1.52V (theoretical temperature -20 degrees)
10: 1.49V (theoretical temperature -15 degrees)
01: 1.44V (theoretical temperature -10 degrees)
00: 1.32V (theoretical temperature 0 degrees)
R/W
11
SYS_CTL4 (Lighting control register)
4.7
Register address = 0x05
Bit(s)
Name
Description
R/W
RESET
7:4
Reserved
XX
3
En_wled_on_r
WLED flashlight button switch control method
0: Long press
1: Short press twice
R/W
0
2:1
Reserved
XX
0
En_wled_r
WLED flashlight (multiplexed with KEY)
1: enable
0: disable
R/W
1
SYS_CTL5 (Light load shutdown time setting)
4.8
Register address = 0x07
Bit(s)
Name
Description
R/W
RESET
7:6
Set_ilow_bst
Output light load shutdown and enter sleep time:
00: 8s
01:16s
10: 32s
11:63s
If it takes longer to shut down at light load, you can enable light load shutdown (0X84
Write 0 to bit6) Turn off for a while and then turn on
R/W
10
5:0
Reserved
XX
SYS_CTL6 (power light configuration register)
4.9
Register address = 0x0A
Bit(s)
Name
Description
R/W
RESET
7
Set_dled_r
LED mode register setting enable
1: enable
0: disable
In I2C mode, you can view the power calculation result through the 0xDB register.
R/W
0
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The result register see 0XDB register
6:5
Dled_mode_r
Register settings to calculate power
00:1 lamp
01:2 lights
10:3 lights
11:4 lights
R/W
00
4:0
Reserved
XX
LED_STATUS (battery information register)
4.10
Register address = 0xDB
Bit(s)
Name
Description
R/W
RESET
7:5
Reserved
XX
4:0
led
Battery indicator level
11111: 4 lights are on
01111: 3 lights are on
00111: 2 lights are on
00011: 1 light is on
00001: Low flashing light during discharge (when 0CV threshold is lower than 3.3V)
00000: Shut down
The default state is 1 battery light, please note that you must use the register to write 4 lights or
Other number of battery lights
R
XX
SYS_CTL7 (output port automatic detection load register)
4.11
Register address = 0x0B
Bit(s)
Name
Description
R/W
RESET
7
Reserved
XX
6:5
Set_pod_time
Setting the interval time when the output port is closed when unplugged from charging to discharging state
00:1s
01:2s
10:3s
11:4s
R/W
00
4
Reserved
XX
Bit3 and bit1 VOUT2_DET
00: Disable the automatic power-on detection function of VOUT2 port load access
Restore VOUT2 port load access automatic power-on detection function Bit3 and bit1
Restore Defaults
R/W
10
Bit2 and bit0 VOUT1_DET
00: Turn off the automatic power-on detection function of VOUT1 port load access
Restore VOUT1 port load access automatic power-on detection function Bit2 and bit0
Restore Defaults
R/W
10
SYS_CTL8 (Key control output port register)
4.12
Register address = 0x0C
Bit(s)
Name
Description
R/W
RESET
7
KEY_TC
Short press the button to turn on the VBUS output port mode selection
1: Open port C directly
0: Detect whether there is a load on the C port, if there is a load, turn on the C port
R/W
0
6
KEY_VOUT2
Short press the button to turn on the VOUT2 output port mode selection
1: Open the VOUT2 output port directly
0: Detect whether there is a load on the VOUT2 output port, and turn on if there is a load
Turn on VOUT2 output port
R/W
0
5
KEY_VOUT1
Short press the button to turn on the VOUT1 output port mode selection
1: Open the VOUT1 output port directly
0: Check whether there is a load on the VOUT1 output port, and turn on if there is a load
R/W
1
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Turn on VOUT1 output port
4: 0
Reserved
11111
SYS_CTL9 (Charge and discharge function register)
4.13
Register address = 0x0D
Bit(s)
Name
Description
R/W
RESET
7:6
Reserved
XX
5:4
VIN and VBUS charging priority selection
00: According to the order of access, the first access is given priority
01: Look at the input voltage, high voltage has priority
1X: When the voltage is the same, VBUS has priority
R/W
01
3
Reserved
XX
2
When simultaneous charging and discharging are enabled, the charging current to the battery core is automatically set to a maximum of about 500mA
1: enable
0: disable
R/W
0
1
En_maxvinlp_r
When simultaneous charging and discharging are enabled, the 5V charging undervoltage ring is automatically increased to 4.72V, and the load is charged first
Electricity
1: enable
0: disable
R/W
0
0
En_same_r
Simultaneous charging and discharging enable
1: enable
0: disable
R/W
0
SYS_CTL10
4.14
Register address = 0x0E
Bit(s)
Name
Description
R/W
RESET
7
Reserved
XX
6
En_chg2bst_r
Does Charge automatically turn on Boost when unplugged?
1: open
0: Do not turn on (if it detects that the output port is loaded, it will turn on the boost to open the output port)
R/W
1
5:3
Reserved
R/W
XX
2
En_swclk1_r
Switch I2C mode 1 standby clock enable (I2C for L1/L2)
1: enable
0: disable
After being enabled, I2C can be accessed at a speed lower than 10k during standby
R/W
0
1:0
Reserved
XX
SYS_CTL11 ( Normally open low current mode setting )
4.15
Register address = 0x0F
Bit(s)
Name
Description
R/W
RESET
7:3
Reserved
XX
2:1
Lowcur_time
Normally open time setting
11: 8 hours
10: 6 hours
01: 4 hours
00: 2 hours
R/W
00
0
En_lowcur
Output normally open for N hours to enable (including multi-port to single-port function is also closed)
1: enable
0: disable
By default, double-click the button to enter the normally open N hours mode, short press the button to exit the normally open N hours
Mode, so after enabling this function, you need to turn off the double-click function
R/W
0
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VBAT_LOW (low power shutdown threshold setting)
4.16
Register address = 0x10
Bit(s)
Name
Description
R/W
RESET
7:6
Reserved
11
5:4
BATLOWSET
BAT actual voltage low power shutdown voltage setting
11 3.00 ←→3.10
10 2.90 ←→3.00
01 2.81 ←→2.89
00 2.73 ←→2.81
R/W
10
3:0
Reserved
XX
VINOV ( VIN input overvoltage setting)
4.17
Register address = 0x11
Bit(s)
Name
Description
R/W
RESET
7:2
Reserved
XX
1:0
VINOVSET
VIN charging overvoltage setting
11:16V
10:14V
01:6.0V
00:5.6V
R/W
10
VBUSOV ( VBUS input overvoltage setting)
4.18
Register address = 0x12
Bit(s)
Name
Description
R/W
RESET
7:2
Reserved
XX
1:0
VBUSOVSET
VBUS charging overvoltage setting
11:16V
10:14V
01:6.0V
00:5.6V
R/W
10
BOOST_LINC ( output line compensation setting register )
4.19
Register address = 0x13
Bit(s)
Name
Description
R/W
RESET
7:2
Reserved
XX
1
Rlineext
Analog line compensation enable
1: enable
0: disable
R/W
1
0
RLINC
Line compensation selection:
1: 250mV@2A, corresponding to the output voltage of VSYS
0: 125mV@2A, corresponding to the output voltage of the VSYS terminal
R/W
0
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TYPE-C_CTRL0 ( typec CC pull-up setting register)
4.20
Register address = 0x1A
Bit(s)
Name
Description
R/W
RESET
7:4
Reserved
XX
3:2
SRC_Rp
When not charging, the SRC current setting of USB TypeC
00: default
01: 1.5A
10: 3A
RW
10
1:0
Reserved
10
TYPE-C_CTRL1 ( typec CC mode configuration register)
4.21
Register address = 0x1B
Bit(s)
Name
Description
R/W
RESET
7:2
Reserved
XX
1:0
CC_mode
CC mode sel
00: UFP
01: DFP
11: DRP
RW
11
TYPE-C_CTRL2 ( typec PD protocol enable register)
4.22
Register address = 0x1C
Bit(s)
Name
Description
R/W
RESET
7:2
Reserved
XX
1
PD function enable PD input and output protocol
1: enable
0: disable
RW
1
0
Reserved
1
TYPE-C_CTRL3
4.23
Register address = 0x1E
Bit(s)
Name
Description
R/W
RESET
7
Reserved
XX
6:5
Vmax_PDsink
PD input requests the highest voltage setting
00: 5V
01: 7V
10: 9V
11: 12V
RW
10
4:0
Reserved
XX
CHG_CTL1 (Charge stop charging voltage setting register)
4.24
Register address = 0x21
Bit(s)
Name
Description
R/W
RESET
7:4
Reserved
XX
3:2
VCHG_SET
Battery stop charging voltage setting: 4.2V/4.35V/4.4V/4.5V
11: 4.2V/4.35V/4.4V/4.5V
10: 4.185V/4.337V/4.382V/4.476V
01: 4.17V/4.321V/4.366V/4.46V
00: 4.155V/4.306V/4.35V/4.44V
RW
01
1:0
R_CV
Reserved
RW
XX
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V1.21
CHG_CTL2 (charge full voltage setting register)
4.25
Register address = 0x22
Bit(s)
Name
Description
R/W
RESET
7:4
Reserved
XX
3:2
VCHG_SET
Full battery voltage setting:
11:4.5
10:4.4
01:4.35
00:4.2
0X2C bit4 needs to write 0 first, set as register setting full voltage
RW
00
1:0
R_CV
4.5V/4.4V/4.35V/4.2V battery constant voltage fast charge:
11: Constant pressure increase by 42mv
10: Constant pressure increase by 28mv
01: Constant pressure increases by 14mv
00: no increase
This voltage can be fine-tuned the full voltage, but the charging voltage needs to be set synchronously
And full voltage-stop charging voltage needs to be greater than 40mv, otherwise some ICs may not stop
Charge
RW
01
CHG_CTL3 (Charge undervoltage loop setting register)
4.26
Register address = 0x23
Bit(s)
Name
Description
R/W
RESET
7:6
Reserved
XX
5:3
R_VIL7
Charging input under-voltage loop threshold @7V:
111:6.7
110:6.64
101:6.59
100:6.53
011:6.47
010:6.42
001:6.36
000:6.25
RW
100
2:0
R_VIL5
Charging input under-voltage loop threshold @5V:
111:4.92
110: 4.88
101:4.84
100: 4.8
011: 4.76
010: 4.72
001: 4.64
000: 4.58
In the charging and discharging state, the modification of this register is invalid after enabling 0X0D bit1, because
The undervoltage ring has been fixed to 4.72V when charging and discharging
RW
000
CHG_CTL4 (Charge undervoltage loop setting register)
4.27
Register address = 0x24
Bit(s)
Name
Description
R/W
RESET
7:6
Reserved
XX
5:3
R_VIL12
Charging input undervoltage loop threshold @12V:
111:11.8
110:11.7
101:11.6
100:11.5
011:11.4
010:11.3
001:11.2
000:11
RW
100
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V1.21
2:0
R_VIL9
Charging input under-voltage loop threshold @9V:
111:8.8
110:8.73
101:8.65
100:8.58
011:8.5
010:8.43
001:8.35
000:8.2
RW
100
CHG_ISET_9V
4.28
Register address = 0x26
Bit(s)
Name
Description
R/W
RESET
7:6
Reserved
XX
5:0
Chg_iset_H9V
Charge ISET @ 9V When charging
Input charging current: Ichg=ISET*0.05A
The calibration value is 2A charging current. If you need to adjust the charging current, you can set it on the basis of the calibration value.
Increase or decrease the corresponding gear
RW
Calibration value
CHG_ISET_12V
4.29
Register address = 0x27
Bit(s)
Name
Description
R/W
RESET
7:6
Reserved
XX
5:0
Chg_iset_H12V
Charge ISET @ 12V When charging
Input charging current: Ichg=ISET*0.05A
(The actual charging current will be 0~300mA smaller than the theoretical value)
IP5328P standard products do not support 12V charging temporarily
RW
000000
CHG_ISET_5V_VBUS
4.30
Register address = 0x29
Bit(s)
Name
Description
R/W
RESET
7:6
Reserved
XX
5:0
Chg_iset_vbus
Charge ISET @ VBUS 5V When charging
Input charging current: Ichg=ISET*0.05A
The calibration value is 2.6A charging current. If you need to adjust the charging current, you can set the calibration value
Increase or decrease the corresponding gear
RW
Calibration value
CHG_ISET_5V_VIN
4.31
Register address = 0x2A
Bit(s)
Name
Description
R/W
RESET
7:6
XX
5:0
Chg_iset_vin
Charge ISET @ VIN 5V When charging
Input charging current: Ichg=ISET*0.05A
(The actual charging current will be 0~300mA smaller than the theoretical value)
The calibration value is 2A charging current. If you need to adjust the charging current, you can set it on the basis of the calibration value.
Increase or decrease the corresponding gear
RW
Calibration value
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V1.21
CHG_ISET_7V
4.32
Register address = 0x2B
Bit(s)
Name
Description
R/W
RESET
7:6
Set_iset_tk
Charge ISET at trickle
Battery terminal charging current: Ichg=ISET*0.05A+0.10A
RW
XX
5:0
Chg_iset_H5V
Charge ISET @ 7V When charging
Input charging current: Ichg=ISET*0.05A
(The actual charging current will be 0~300mA smaller than the theoretical value)
The calibration value is 2.4A charging current. If the charging current needs to be adjusted, the calibration value can be
Increase or decrease the corresponding gear
RW
Calibration value
CHG_TIMER_EN (Charge timeout setting register)
4.33
Register address = 0x2C
Bit(s)
Name
Description
R/W
RESET
7
En_tktime_r
Trickle timer enable
0: disable
1: enable
RW
1
6
En_cvtime_r
Charge CV timing enable
0: disable
1: enable
RW
1
5
En_chgtime_r
Charge total timing enable (CC+CV)
0: disable
1: enable
RW
1
4
En_vset_r
VSET setting mode
0: Set by register (0x22h[3:2])
1: Set by pin
RW
1
3:1
Reserved
XX
0
En_tk_r
Trickle enable
0: disable
1: enable
RW
1
CHG_TIMER_SET (Charge timeout setting register)
4.34
Register address = 0x2D
Bit(s)
Name
Description
R/W
RESET
7:6
Set_tk_time
Trickle timeout setting
00: 2h
01: 3h
10: 4h
11: 6h
RW
11
5:4
Set_pcc_time
Constant voltage intermittent time N setting (when fast full charge, charge current decreases to 0 every N minutes
See if the battery voltage is full)
00: 2min
01: 4min
10: 8min
11: 16min
RW
01
3:2
Set_cv_time
Charge CV timeout setting
00: 2h
01: 4h
10: 6h
11: 8h
RW
11
1:0
Set_chg_time
Charge CC+CV timeout setting
00: 8h
01: 12h
10: 16h
11: 24h
RW
11
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V1.21
DCDC_FREQ ( DC-DC switching frequency setting register)
4.35
Register address = 0x31
Bit(s)
Name
Description
R/W
RESET
7:5
BSTFRQ
BST frequency setting
125k+125k*code
The switching frequency is not recommended for customers to adjust, if you need to adjust, you can contact the original factory engineer
confirm
RW
010
4:2
CHGFRQ
CHG frequency setting
125k+125k*code
The switching frequency is not recommended for customers to adjust, if you need to adjust, you can contact the original factory engineer
confirm
RW
010
1:0
Reserved
XX
QC_EN (input and output port DCP fast charge protocol enable register)
4.36
Register address = 0x3E
Bit(s)
Name
Description
R/W
RESET
7:4
Reserved
XX
3
EN_QC_VBUS
VBUS channel input and output (excluding PD and MKT protocol)
0: disable
1: enable
RW
1
2
EN_QC_VIN
VIN channel input fast charge enable
0: disable
1: enable
RW
1
1
EN_QC_VOUT2 VOUT2 channel output fast charge enable (not including MKT protocol)
0: disable
1: enable
RW
1
0
EN_QC_VOUT1 VOUT1 channel output fast charge enable (not including MKT protocol)
0: disable
1: enable
RW
1
PMOS_REG_CTL0 (input and output port control register)
4.37
Register address = 0x59
Bit(s)
Name
Description
R/W
RESET
7:6
Reserved
XX
5
En_vout2_r
Register control vout2 path
0: close
1: open
R/W
0
4
Vout2_ctrl
Register control vout2 path
0: State machine automatic control
1: Register control
R/W
0
3
En_vout1_r
Register control vout1 path
0: State machine automatic control
1: Register control
R/W
0
2
Vout1_ctrl
Register control vout1 path
0: close
1: open
R/W
0
1
En_vin_r
Register controls VIN path
0: close
1: open
R/W
0
0
Vin_ctrl
Register controls VIN path
0: State machine automatic control
1: Register control
R/W
0
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V1.21
PMOS_REG_CTL1 (input and output port control register)
4.38
Register address = 0x5A
Bit(s)
Name
Description
R/W
RESET
7:6
Reserved
00
5
Set_vinlp_mode
Register setting or status setting charging and charging gear
1: Register (0x5Ah[4:3]) (only one gear can be fixed for voltage charging)
0: status setting
R/W
0
4:3
Svinloop_r
Register setting charging voltage gear
00: 5V
01: 7V
10: 9V
11: 12V
R/W
00
2
En_vbusi_r
Register control VBUS input channel
0: close
1: open
R/W
0
1
En_vbuso_r
Register controls VBUS output path
0: close
1: open
R/W
0
0
Vbus_ctrl
Register control VBUS path control
0: State machine automatic control
1: Register control (0x5A[2:1])
R/W
0
FORCE_EN (register shutdown and reset control register)
4.39
Register address = 0x5B
Bit(s)
Name
Description
R/W
RESET
7
Force_WLED
R/W
0
6
En_force_WLED
Write 1 to bit6 first, then write 1 to bit7, the WLED can be triggered internally;
After turning on, write 0 to bit7 first, then write 0 to bit6 to turn off WLED
R/W
0
5
Force_reset
R/W
0
4
Force_boost
R/W
0
3
Reserved
XX
2
En_force_ restart
Write 1 to bit2 first, then write 1 to bit5, the chip reset can be triggered internally
R/W
0
1
En_force_boost
Write 1 to bit1 first, then write 1 to bit4, the BOOST can be triggered internally.
When BOOST is turned on, write 0 to bit4 when both bit1 and bit4 are 1.
Send off BOOST and shut down immediately. Only write 0 to 0x01 register bit2 will only turn off
BOOST, but it will not shut down immediately. Shutdown still needs to wait for light load conditions.
R/W
0
0
Reserved
XX
FLAG0 ( abnormal flag bit )
4.40
Register address = 0x7E
Bit(s)
Name
Description
R/W
7
BOOST short circuit abnormal flag (need to write 1 to clear 0)
R/W
6
BOOST undervoltage abnormal flag (output overcurrent flag) (need to write 1 to clear 0)
R/W
5
BOOST abnormal hiccup flag (need to write 1 to clear 0)
R/W
4
BOOST abnormal shutdown flag (need to write 1 to clear 0)
R/W
3
BOOST start failure flag (need to write 1 to clear 0)
R/W
2
NTC low temperature flag (need to write 1 to clear 0)
R/W
1
NTC high temperature flag (need to write 1 to clear 0)
R/W
0
IC internal high temperature flag (need to write 1 to clear 0)
R/W
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V1.21
FLAG1 (button and overvoltage flag)
4.41
Register address = 0x7F
Bit(s)
Name
Description
R/W
7
Double-click the button to mark (need to write 1 to clear 0)
R/W
6
Long press the button (need to write 1 to clear 0)
R/W
5
Button short press sign (need to write 1 to clear 0)
R/W
4
Reserved
XX
3
Reserved
XX
2
Reserved
XX
1
VBUS overvoltage flag (need to write 1 to clear 0)
R/W
0
VIN overvoltage flag (need to write 1 to clear 0)
R/W
BST_POWERLOW (Light load shutdown power threshold setting register)
4.42
Register address = 0x81
Bit(s)
Name
Description
R/W
RESET
7:5
Reserved
XX
4:0
Set_power_th Config BOOST powerlow hreshold (light load shutdown power threshold)
powerlow LSB 16.88mW
The default value is 300mW, the maximum value is 540mW
RW
10010
RSET (battery internal resistance compensation register)
4.43
Register address = 0x82
Bit(s)
Name
Description
R/W
RESET
7:4
Set_bat_imp
Register Config impendece
6.25mOhm* set_bat_imp
The internal register sets the internal compensation of the cell
RW
011
3:2
Set_imp_offse
t
Config impendence offset
00:0 mohm
01:12.5 mohm
10:25 mohm
11:50 mohm
Set internal resistance = offset+6.25mOhm* set_bat_imp
RW
000
1
Sel_ext_imp
Cell internal resistance RSET setting register
1: External RSET setting register
0: Internal register setting (0X82 bit7-2)
RW
1
0
Reserved
XX
BST_ISYSLOW (Light load shutdown current register)
4.44
Register address = 0x84
Bit(s)
Name
Description
R/W
RESET
7
En_isyslow_r
ISYSLOW BOOST status output total current light load shutdown enable
1:enable
0:disable
RW
0
6
En_powerlow
_r
POWERLOW BOOST state output total power light load shutdown enable
1:enable
0:disable
The default is to look at the total output power to shut down under light load (the threshold setting register is at 0x81 bit4:0)
RW
1
5:0
Set_isys_th
Config ISYS_LOW hreshold (light load output current threshold setting)
isyslow LSB 2.55766mA
RW
010111
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V1.21
IPMOSLOW (Multi-port to single-port MOS off current threshold setting register)
4.45
Register address = 0x86
Bit(s)
Name
Description
R/W
RESET
7:0
Set_ipmos_th
Config IPMOS hreshold
Actively close the current threshold setting of the light load output port when multi-port output
LSB=2.55766mA corresponds to a 10mOhm sampling resistor. The actual situation needs to be based on
The impedance of the trace from VSN to VOUT1 or VOUT2 on the PCB + MOS transistor on-resistance follows
The multiple relationship of 10mOhm is converted. If the actual impedance is 20mOhm, yes
2 times of 10mOhm, then LSB is also 1/2 times the theoretical value
RW
0x46
BATOCV_LOW ( low power exit, active exit fast charge setting register )
4.46
Register address = 0x88
Bit(s)
Name
Description
R/W
RESET
7:5
Reserved
XX
4
En_dndcp
BATOCV battery cell low voltage closes the chip's built-in fast charge output function enable
1:enable
0:disable
*The fast charge triggered by the external fast charge protocol IC is not controlled by this
RW
0
3:0
Set_dndcpth_
r
BATOCV low voltage turn off fast charge threshold
(Offset=2.6V, LSB=69mV)
RW
0000
IPMOSLOW_TIME (Multi-port to single-port time setting register)
4.47
Register address = 0x90
Bit(s)
Name
Description
R/W
RESET
7:6
The relationship between PMOS ilow time and light load shutdown time:
00: half of the light load shutdown time
01: Same as shutdown time under light load
10: 2 times the light load shutdown time
11: 4 times the light load shutdown time
R/W
00
5:0
Reserved
XX
QC_VMAX (Set the maximum output voltage of QC protocol)
4.48
Register address = 0x96
Bit(s)
Name
Description
R/W
RESET
7
Reserved
XX
6
Set the MAX maximum voltage supported by QC SRC mode
1:12V
0:9V
R/W
1
5:0
Reserved
XX
BATOCV_LOW_DN
4.49
Register address = 0x9F
Bit(s)
Name
Description
R/W
RESET
7:6
Reserved
XX
5:0
BATOCV_LOW (default 2.900V)
2600+data*8.59375mv
R/W
000000
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V1.21
DCP_DIG_CTL0
4.50
Register address = 0xA0
Bit(s)
Name
Description
R/W
RESET
7:4
Reserved
XX
3
En_vbus_dcp_r
DPC DMC enable of VBUS (all protocols related to DM DP include ordinary 5V Apple
Fruit, Samsung, BC1.2 agreement)
1:enable
0:disable
RW
1
2
En_vin_dcp_r
VIN DPB DMB enable (all protocols related to DM DP include ordinary 5V Apple,
Samsung, BC1.2 agreement)
1:enable
0:disable
RW
1
1
En_vout2_dcp_r
DPA2 DMA2 enable of VOUT2 (all protocols related to DM DP include ordinary 5V
Apple, Samsung, BC1.2 agreement)
1:enable
0:disable
RW
1
0
En_vout1_dcp_r
DPA1 DMA1 enable of VOUT1 (all protocols related to DM DP include ordinary 5V
Apple, Samsung, BC1.2 agreement)
1:enable
0:disable
RW
1
DCP_DIG_CTL1 ( input protocol enable register )
4.51
Register address = 0XA1
Bit(s)
Name
Description
R/W
RESET
7
Reserved
RW
XX
6
Reserved
RW
XX
5
Reserved
RW
XX
4
SFCP SINK enable (input enable)
RW
0
3
AFC SINK enable (input enable)
RW
1
2
FCP SINK enable (input enable)
RW
1
1
Reserved
RW
XX
0
Reserved
RW
XX
DCP_DIG_CTL2 ( output protocol enable register )
4.52
Register address = 0xA2
Bit(s)
Name
Description
R/W
RESET
7
En_mtkrx9v_r
Maximum voltage setting supported by MTK PE 1.1 RX
0: 12V
1: 9V
RW
0
6
En_mtkrx2_r
MTK PE2.0 RX enable (output enable)
1:enable
0:disable
RW
1
5
En_mtkrx1_r
MTK PE1.1 RX enable (output enable)
1:enable
0:disable
RW
1
4
En_sfcpsrc_r
SFCP SRC enable (output enable)
1:enable
0:disable
RW
1
3
En_afcsrc_r
AFC SRC enable (output enable)
1:enable
0:disable
RW
1
2
En_fcpsrc_r
FCP SRC enable (output enable)
1:enable
0:disable
RW
1
1
En_qc3src_r
QC3.0 SRC enable (output enable)
RW
1
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V1.21
1:enable
0:disable
0
En_qc2src_r
QC2.0 SRC enable ((output enable))
1:enable
0:disable
RW
1
Note: After QC2.0 and QC3.0 are enabled and closed, the corresponding AFC and FCP protocols will also be closed.
BOOST_5V_ISET
4.53
Register address = 0xA8
Bit(s)
Name
Description
R/W
RESET
7:6
Reserved
5:0
Iset_5v_r
The total output current limit setting of BST 5V, the default value is about 3.2A, step50mA
(This register will affect the 18W power limit when greater than 5V)
Note that when you need to modify the output power, you need to add and subtract on the basis of the default value.
Write the fixed value directly, the individual difference of writing the fixed value IC will be relatively large, and the register write
All 0 output current is not necessarily 0.
If the output power is reduced, the PD package of port C cannot be reduced accordingly, there is a PD package
Information is greater than the output power.
RW
Calibration value
BOOST_VSET (Output voltage control register)
4.54
Register address = 0x4C
Bit(s)
Name
Description
R/W
RESET
7:6
Reserved
XX
3:2
Trsel_set
11: 12V
10: 9V
01: 7V
00: 5V
After this voltage is set, it can only be applied in single port mode. For multi-port applications, the system will have overvoltage protection.
RW
00
1
Trsel_ctl
BOOST voltage control method:
1: Register 0X4C bit3-2 controls the output voltage
0: IP5328P internal state machine controls the output voltage
RW
0
DCP_DIG_CTL10
4.55
Register address = 0xAA
Bit(s)
Name
Description
R/W
RESET
7:6
At_same_mode
The state of charging and discharging the DP DM at the same time
11: Support Apple, Samsung, BC1.2
10: Floating
01: short circuit
00: Support Apple, Samsung, BC1.2
RW
01
5:0
Reserved
XX
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V1.21
5 Read-only status indication register
BATVADC_DAT0 ( BAT real voltage register)
5.1
Register address = 0x64
Bit(s)
Name
Description
R/W
7:0
BATVADC[7:0]
BATVADC data lower 8bit
The true voltage of BATPIN
R
BATVADC_DAT1 ( BAT real voltage register)
5.2
Register address = 0x65
Bit(s)
Name
Description
R/W
7:0
BATVADC[15:8]
High 8bit of BATVADC data
VBAT=BATVADC*0.26855mv+2600mv
The true voltage of BATPIN
R
BATIADC_DAT0 ( BAT terminal current register)
5.3
Register address = 0x66
Bit(s)
Name
Description
R/W
7:0
BATIADC[7:0]
Cell end current BATIADC data lower 8bit
R
BATIADC_DAT1 ( BAT terminal current register)
5.4
Register address = 0x67
Bit(s)
Name
Description
R/W
7:0
BATIADC[15:8]
Cell end current BATIADC data high 8bit
IBAT=BATVADC*1.27883mA
LSB=1.27883mA corresponds to 10mOhm sampling resistor
(Complement code format, charging is positive, discharging is negative)
For example: 00000000_00000001 means 1
11111111_11111111 means -1
11111111_11111110 means -2
The current is the value calculated by output power and efficiency, and different currents are stored
Within a certain error
R
SYSVADC_DAT0 ( VSYS terminal voltage value register)
5.5
Register address = 0x68
Bit(s)
Name
Description
R/W
7:0
SYSVADC[7:0]
The low 8bit of SYSVADC data (VSYS terminal voltage value)
R
SYSVADC_DAT1 ( VSYS terminal voltage value register)
5.6
Register address = 0x69
Bit(s)
Name
Description
R/W
7:0
SYSVADC [15:8]
High 8bit of SYSVADC data (VSYS terminal voltage value)
SYSV=SYSVADC * 1.61133mV+15.6V
(Complement format, valid values ​​are usually negative)
For example: 00000000_00000001 means 1
R
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V1.21
11111111_11111111 means -1
11111111_11111110 means -2
SYSIADC_DAT0 ( Current register flowing through 10 milliohm sampling resistor)
5.7
Register address = 0x6A
Bit(s)
Name
Description
R/W
7:0
SYSIADC [7:0]
Low 8bit of SYSIADC data (VSYS terminal current)
R
SYSIADC_DAT1 ( Current register flowing through 10 milliohm sampling resistor)
5.8
Register address = 0x6B
Bit(s)
Name
Description
R/W
7:0
SYSIADC [15:8]
The high 8bit of SYSIADC data (VSYS terminal current)
SYSI=SYSIADC * LSB
LSB=0.6394mA corresponds to 10mOhm sampling resistor
(Complement format, discharge is negative, charge is positive)
For example: 00000000_00000001 means 1
11111111_11111111 means -1
11111111_11111110 means -2
R
VINIADC_DAT0 ( Current register of MOS flowing through VIN path )
5.9
Register address = 0x6C
Bit(s)
Name
Description
R/W
7:0
VINIADC [7:0]
Low 8bit of VINIADC data (VIN terminal current)
This current only works in multi-port state
R
VINIADC_DAT1 ( Current register of MOS flowing through VIN path )
5.10
Register address = 0x6D
Bit(s)
Name
Description
R/W
7:0
VINIADC [15:8]
High 8bit of VINIADC data (VIN terminal current)
VINI=VINIADC *LSB
LSB=0.6394mA corresponds to a 10mOhm sampling resistor. The actual situation needs to be based on
The impedance of the trace from VSN to VIN on the PCB + the on-resistance of the MOS transistor is 10mOhm times
The number relationship is converted. If the actual impedance is 20mOhm, it is 10mOhm 2
Times, the LSB is also 1/2 of the theoretical value
It needs to be in charge state when VINOK and VBUSOK are both valid and VIN MOS is turned on.
ADC will start
(Complement format, discharge is positive, charge is negative)
For example: 00000000_00000001 means 1
11111111_11111111 means -1
11111111_11111110 means -2
This current only works in multi-port state
R
VBUSIADC_DAT0 ( Current register of VBUS channel MOS flowing through)
5.11
Register address = 0x6E default 0x00
Bit(s)
Name
Description
R/W
7:0
VBUSIADC[7:0]
Low 8bit of VBUSIADC data (VBUS terminal current)
This current only works in multi-port state
R
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VBUSIADC_DAT1 ( current register flowing through MOS of VBUS path )
5.12
Register address = 0x6F
Bit(s)
Name
Description
R/W
7:0
VBUSIADC[15:8]
High 8bit of VBUSIADC data (VBUS terminal current)
VBUSI=VBUSIADC*LSB
LSB=0.6394mA corresponds to a 10mOhm sampling resistor. The actual situation needs to be based on
The impedance of the trace from VSN to VBUS on the PCB + the on-resistance of the MOS transistor is equal to that of 10mOhm.
The multiple relationship is converted. If the actual impedance is 20mOhm, it is 10mOhm 2
Times, the LSB is also 1/2 of the theoretical value
Need to be valid at the same time when VINOK and VBUSOK are in charge state and VBUS MOS is turned on;
Or when VBUS MOS is turned on and other MOS is also turned on, the ADC will
start up;
(Complement format, discharge is positive, charge is negative)
For example: 00000000_00000001 means 1
11111111_11111111 means -1
11111111_11111110 means -2
This current only works in multi-port state
R
VOUT1IADC_DAT0 ( Current flowing through MOS in VOUT1 channel )
5.13
Register address = 0x70
Bit(s)
Name
Description
R/W
7:0
VOUT1IADC[7:0] The lower 8bit of VOUT1IADC data (Vout1 terminal current)
This current only works in multi-port state
R
VOUT1IADC_DAT1 ( Current register of MOS flowing through VOUT1 channel )
5.14
Register address = 0x71 default 0x00
Bit(s)
Name
Description
R/W
7:0
VOUT1IADC[15:8] High 8bit of VOUT1IADC data (Vout1 terminal current)
VOUT1I = VOUT1IADC *LSB
LSB=0.6394mA corresponds to a 10mOhm sampling resistor. The actual situation needs to be based on
The trace impedance from VSN to VOUT1 on the PCB + the on-resistance of the MOS transistor is equal to the 10mOhm
The multiple relationship is converted. If the actual impedance is 20mOhm, it is 10mOhm 2
Times, the LSB is also 1/2 of the theoretical value
It needs to be turned on when VOUT1 MOS is turned on and other MOS is also turned on.
Will start
(Complement format, discharge is positive, charge is negative)
For example: 00000000_00000001 means 1
11111111_11111111 means -1
11111111_11111110 means -2
This current only works in multi-port state
R
VOUT2IADC_DAT0 ( Current register of MOS flowing through VOUT2 channel )
5.15
Register address = 0x72
Bit(s)
Name
Description
R/W
7:0
VOUT2IADC[7:0] Low 8bit of VOUT2IADC data (Vout2 terminal current)
This current only works in multi-port state
R
VOUT2IADC_DAT1 ( Current register of MOS flowing through VOUT2 channel )
5.16
Register address = 0x73
Bit(s)
Name
Description
R/W
7:0
VOUT2IADC[15:8] High 8bit of VOUT2IADC data (Vout2 terminal current)
VOUT2I = VOUT2IADC *LSB
LSB=0.6394mA corresponds to a 10mOhm sampling resistor. The actual situation needs to be based on
R
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The impedance of the trace from VSN to VOUT2 on the PCB + the on-resistance of the MOS transistor is equal to that of 10mOhm.
The multiple relationship is converted. If the actual impedance is 20mOhm, it is 10mOhm 2
Times, the LSB is also 1/2 of the theoretical value
Need to turn on VOUT2 MOS when other MOS is also turned on, the ADC
Will start
(Complement format, discharge is positive, charge is negative)
For example: 00000000_00000001 means 1
11111111_11111111 means -1
11111111_11111110 means -2
This current only works in multi-port state
RSETADC_DAT0
5.17
Register address = 0x74
Bit(s)
Name
Description
R/W
7:0
RSETADC[7:0]
Low 8bit of RSETADC data
R
RSETADC_DAT1
5.18
Register address = 0x75
Bit(s)
Name
Description
R/W
7:0
RSETADC [15:8]
High 8bit of RSETADC data
RSET=RSETADC*0.26855mv+1.5V
(Complement format)
For example: 00000000_00000001 means 1
11111111_11111111 means -1
11111111_11111110 means -2
R
GPIADC_DAT0 ( GPIO ADC voltage value register)
5.19
Register address = 0x78
Bit(s)
Name
Description
R/W
7:0
GPIADC [7:0]
Lower 8bit of GPIADC data
R
GPIADC_DAT1 ( GPIO ADC voltage value register)
5.20
Register address = 0x79
Bit(s)
Name
Description
R/W
7:0
GPIADC [15:8]
High 8bit of GPIADC data
GPI=GPIADC*0.26855mv+1.5V
(Complement format)
For example: 00000000_00000001 means 1
11111111_11111111 means -1
11111111_11111110 means -2
R
BATOCV_DAT0 ( BATOCV voltage register)
5.21
Register address = 0x7A
Bit(s)
Name
Description
R/W
7:0
BATOCV [7:0]
Low 8bit of BATOCV data
BATOCV voltage is the BAT voltage that is compensated by the internal resistance of the cell and the cell current at the same time
There is a voltage after digital filtering
R
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V1.21
BATOCV_DAT1 ( BATOCV voltage register)
5.22
Register address = 0x7B
Bit(s)
Name
Description
R/W
7:0
BATOCV [15:8]
High 8bit of BATOCV data
OCV = BATOCV *0.26855mv+2.6V
BATOCV voltage is the BAT voltage that is compensated by the internal resistance of the cell and the cell current at the same time
There is a voltage after digital filtering
R
POWER_DAT0 (input and output power register)
5.23
Register address = 0x7C
Bit(s)
Name
Description
R/W
7:0
POWER [7:0]
POWER data lower 8bit
R
POWER_DAT1 (input and output power register)
5.24
Register address = 0x7D
Bit(s)
Name
Description
R/W
7:0
POWER [15:8]
POWER data high 8bit
OCV = POWER *8.44mW
R
SYS_STATUS (System Status Indication Register)
5.25
Register address = 0xD1
Bit(s)
Name
Description
R/W
7:5
Reserved
R
4
CHG_EN
Current status indication
0: discharge state
1: charging status
R
3
Reserved
R
2:0
SYS_STATE
000: standby
001: 5V charging
010: Single port with charge and release
011: Multiple mouths are charged and released at the same time
100: High-voltage fast charging
101: 5V discharge
110: Multi-port 5V discharge
111: High voltage fast charge and discharge
R
KEY_IN (System Status Indication Register)
5.26
Register address = 0xD2
Bit(s)
Name
Description
R/W
7:6
Reserved
R
5
VBUSOK
VBUS voltage valid flag, TYPEC charge and discharge this bit will be valid
1: VBUS has power
0: VBUS is out of power
R
4
VINOK
VIN voltage valid flag
1: VIN has electricity
0: VIN is dead
R
3:1
Reserved
R
0
Key_in
The real-time status of the button pin, 0 means the button is currently pressed
1: The key has input
0: No key input
R
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V1.21
OV_FLAG (system overvoltage / undervoltage register)
5.27
Register address = 0xD3
Bit(s)
Name
Description
R/W
7:4
Reserved
R
3
BATLOW
BAT voltage is lower than the low power threshold set by the 0x10 register
1: BAT voltage is lower than the low power threshold set by the 0x10 register
0: BAT voltage is higher than the low power threshold set by register 0x10
R
2
VSYSOV
VSYS voltage is higher than 5.6V
1: VSYS voltage is higher than 5.6V
0: VSYS voltage is lower than 5.6V
R
1
VBUSOV
VBUS voltage is higher than the overvoltage threshold set by the 0x12 register
1: VBUS overvoltage
0: VBUS is not overvoltage
R
0
VINOV
VIN voltage is higher than the overvoltage threshold set by the 0x11 register
1: VIN overvoltage
0: VIN is not overpowered
R
VIN_VBUS_STATE ( VIN/VBUS charging voltage register)
5.28
Register address = 0xD5
Bit(s)
Name
Description
R/W
7:6
Reserved
R
5:3
VBUS_STATE
When VBUS is charging, the range of input voltage
000: 5V voltage range
001: 7V voltage range
011: 9V voltage range
111: 12V voltage range
R
2:0
VIN_STATE
When VIN is charging, the range to which the input voltage belongs
000: 5V voltage range
001: 7V voltage range
011: 9V voltage range
111: 12V voltage range
R
CHG_STATUS (Charge Status Indication Register)
5.29
Register address = 0xD7
Bit(s)
Name
Description
R/W
7
Chgop
Charging working status:
0: It may happen to be detected when charging is stopped, it may be full, or it may be abnormal protection.
Protection (Timer Out, or input OV, or NTC abnormal), it may also be
Charging is not started, please refer to sys_state, chg_state and NTC for specific status.
1: Charging
R
6
Chg_end
Charge full Charge end sign:
0: Not fully charged
1: Fully charged
R
5
Chg_ovtime
Timer Out at constant voltage and constant current total
0: No timeout when totaling constant voltage and constant current
1: Timeout during constant voltage and constant current total
R
4
Cv_ovtime
Constant pressure timer Timer Out
0: Constant pressure timer has not timed out
1: Constant voltage timing timeout
R
3
Tk_ovtime
Trickle Timer Out
0: The trickle timer has not timed out
1: Trickle timer timeout
R
2:0
Chg_state
charging
000: IDLE
R
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001: trickle charge stage
010: Constant current charging stage
011: Constant voltage charging stage
100: Stop charge detection
101: The battery is fully charged
110: Timer Out
LOW_STATUS (system light load flag)
5.30
Register address = 0xD9
Bit(s)
Name
Description
R/W
7
Reserved
R
6
POWLOW
The current total output power is less than the set low power shutdown threshold
1: light load
0: heavy load
R
5
Reserved
R
4
BATOCV_LOW
BAT_OCV voltage is lower than the low-power shutdown threshold set by the 0x9F register
1: Less than BATOV_LOW
0: greater than BATOVC_LOW
R
3
ISYSLOW
The current total output current is less than the set low current shutdown threshold
1: light load
0: heavy load
R
2:0
Reserved
R
NTC_FLAG ( NTC status indication register)
5.31
Register address = 0xDA
Bit(s)
Name
Description
R/W
7
NTC_SC
NTC short-circuit mark
0: External shorted to ground, NTC is invalid
1: Externally connect NTC resistance, NTC is valid
R
6:4
NTC_IN
000: high temperature
100: medium temperature
110: normal temperature
111: Low temperature
R
3:0
Reserved
R
LOWCUR_FLAG (normally open N hours standard position)
5.32
Register address = 0xDE
Bit(s)
Name
Description
R/W
7
Lowcu_en
Enter normally open N hours mode
1: The system has entered the normally open mode for N hours
0: The system has not entered the normally open mode for N hours
This bit can indicate whether the system has entered the normally open mode for N hours, which is convenient for
MCU to indicate a special battery indicator
R
6:0
Reserved
R
MOS_ON (path MOS on status register)
5.33
Register address = 0xE5
Bit(s)
Name
Description
R/W
7
SVINVBUS
0: Current charging is using VIN channel
1: The current charging is using the VBUS channel
R
6
VINOK_in
VIN voltage valid flag
1: Effective
0: invalid
R
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5
VBUSOK_in
VBUS voltage valid flag, TYPEC charge and discharge this bit will be valid
1: Effective
0: invalid
R
4
VIN_pmos_en
VIN MOS on
1: open
0: not open
R
3
Reserved
R
2
VBUS_pmos_en
VBUS MOS on
1: open
0: not open
R
1
VOUT2_mos_en
VOUT2 MOS on
1: open
0: not open
R
0
VOUT1_mos_en
VOUT1 MOS on
1: open
0: not open
R
BST_V_FLAG ( BOOST voltage range register)
5.34
Register address = 0xFB
Bit(s)
Name
Description
R/W
7:4
Reserved
R
3
BST_V_FLAG[3]
BOOST output is greater than 10V and less than or equal to 12V
R
2
BST_V_FLAG[2]
BOOST output is greater than 8V and less than or equal to 10V
R
1
BST_V_FLAG[1]
BOOST output is greater than 6V and less than or equal to 8V
R
0
BST_V_FLAG[0]
BOOST fast charge logo
R
TYPEC_OK ( TYPEC connection status register)
5.35
Register address = 0XB8
Bit(s)
Name
Description
R/W
7:6
Reserved
R
5
CC_SRC_OK
TYPE-C Sink successfully connected (CC pull-up connection is successful)
1: Successfully connected
0: not connected
R
1
CC_SNK_OK
TYPE-C SRC connection is successful (CC pull-down connection is successful)
1: Successfully connected
0: not connected
R
0
Reserved
R
TYPEC_FLAG ( TYPEC pull-up status register)
5.36
Register address = 0xFC
Bit(s)
Name
Description
R/W
2:0
Snk_at
001: The power output capacity of TYPE-C connection is default mode
011: TYPE-C connection power output capacity is 1.5A
111: TYPE-C connection power output capacity is 3.0A
R
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V1.21
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